103 research outputs found

    Addressable Superconductor Integrated Circuit Memory from Delay Lines

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    Recent advances in logic schemes and fabrication processes have renewed interest in using superconductor electronics for energy-efficient computing and quantum control processors. However, scalable superconducting memory still poses a challenge. To address this issue, we present an alternative to approaches that solely emphasize storage cell miniaturization by exploiting the minimal attenuation and dispersion properties of superconducting passive transmission lines to develop a delay-line memory system. This fully superconducting design operates at speeds between 20 GHz and 100 GHz, with ±\pm24\% and ±\pm13\% bias margins, respectively, and demonstrates data densities in the 10s of Mbit/cm2^2 with the MIT Lincoln Laboratory SC2 fabrication process. Additionally, the circulating nature of this design allows for minimal control circuitry, eliminates the need for data splitting and merging, and enables inexpensive implementations of sequential access and content-addressable memories. Further advances in fabrication processes suggest data densities of 100s of Mbit/cm2^2 and beyondComment: 13 pages, 8 figures, 1 table, under revie

    Low-Cost Superconducting Fan-Out with Repurposed Josephson Junctions

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    Superconductor electronics (SCE) promise computer systems with orders of magnitude higher speeds and lower energy consumption than their complementary metal-oxide semiconductor (CMOS) counterpart. At the same time, the scalability and resource utilization of superconducting systems are major concerns. Some of these concerns come from device-level challenges and the gap between SCE and CMOS technology nodes, and others come from the way Josephson Junctions (JJs) are used. Towards this end, we notice that a considerable fraction of hardware resources are not involved in logic operations, but rather are used for fan-out and buffering purposes. In this paper, we ask if there is a way to reduce these overheads; propose the repurposing of JJs at the cell boundaries for fan-out; and establish a set of rules to discretize critical currents in a way that is conducive to this reassignment. Finally, we demonstrate the accomplished gains through detailed analog simulations and modeling analyses. Our experiments indicate that the introduced method leads to a 48% savings in the JJ count in a tree with a fan-out of 1024, as well as an average of 43% of the JJ count for signal splitting and 32% for clock fan-out in ISCAS'85 benchmarks.Comment: 11 pages, 20 figures, submitted to IEEE TA

    Advanced Fabrication Processes for Superconducting Very Large Scale Integrated Circuits

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    We review the salient features of two advanced nodes of an 8-Nb-layer fully planarized process developed recently at MIT Lincoln Laboratory for fabricating Single Flux Quantum(SFQ) digital circuits with very large scale integration on 200-mm wafers: the SFQ4ee and SFQ5ee nodes, where 'ee' denotes the process is tuned for energy efficient SFQ circuits. The former has eight superconducting layers with 0.5 {\mu}m minimum feature size and a 2 {\Omega}/sq Mo layer for circuit resistors. The latter has nine superconducting layers: eight Nb wiring layers with the minimum feature size of 350 nm and a thin superconducting MoNx layer (Tc ~ 7.5 K) with high kinetic inductance (about 8 pH/sq) for forming compact inductors. A nonsuperconducting (Tc < 2 K) MoNx layer with lower nitrogen content is used for 6 {\Omega}/sq planar resistors for shunting and biasing of Josephson junctions. Another resistive layer is added to form interlayer, sandwich-type resistors of m{\Omega} range for releasing unwanted flux quanta from superconducting loops of logic cells. Both process nodes use Au/Pt/Ti contact metallization for chip packaging. The technology utilizes one layer of Nb/AlOx-Al/Nb JJs with critical current density, Jc of 100 {\mu}A/{\mu}m^2 and minimum diameter of 700 nm. Circuit patterns are defined by 248-nm photolithography and high density plasma etching. All circuit layers are fully planarized using chemical mechanical planarization (CMP) of SiO2 interlayer dielectric. The following results and topics are presented and discussed: the effect of surface topography under the JJs on the their properties and repeatability, critical current and Jc targeting, effect of hydrogen dissolved in Nb, MoNx properties for the resistor layer and for high kinetic inductance layer, technology of m{\Omega}-range resistors.Comment: 10 pages, 12 figures, 1 table, 27 references. The paper was presented on September 8, 2015 at the 12th European Conference on Applied Superconductivity, EUCAS 2015, 6-10 September 2015, Lyon, France, IEEE Transaction on Applied Superconductivity, 201

    Female Mucopolysaccharidosis IIIA Mice Exhibit Hyperactivity and a Reduced Sense of Danger in the Open Field Test

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    Reliable behavioural tests in animal models of neurodegenerative diseases allow us to study the natural history of disease and evaluate the efficacy of novel therapies. Mucopolysaccharidosis IIIA (MPS IIIA or Sanfilippo A), is a severe, neurodegenerative lysosomal storage disorder caused by a deficiency in the heparan sulphate catabolising enzyme, sulfamidase. Undegraded heparan sulphate accumulates, resulting in lysosomal enlargement and cellular dysfunction. Patients suffer a progressive loss of motor and cognitive function with severe behavioural manifestations and premature death. There is currently no treatment. A spontaneously occurring mouse model of the disease has been described, that has approximately 3% of normal enzyme activity levels. Behavioural phenotyping of the MPS IIIA mouse has been previously reported, but the results are conflicting and variable, even after full backcrossing to the C57BL/6 background. Therefore we have independently backcrossed the MPS IIIA model onto the C57BL/6J background and evaluated the behaviour of male and female MPS IIIA mice at 4, 6 and 8 months of age using the open field test, elevated plus maze, inverted screen and horizontal bar crossing at the same circadian time point. Using a 60 minute open field, we have demonstrated that female MPS IIIA mice are hyperactive, have a longer path length, display rapid exploratory behaviour and spend less time immobile than WT mice. Female MPS IIIA mice also display a reduced sense of danger and spend more time in the centre of the open field. There were no significant differences found between male WT and MPS IIIA mice and no differences in neuromuscular strength were seen with either sex. The altered natural history of behaviour that we observe in the MPS IIIA mouse will allow more accurate evaluation of novel therapeutics for MPS IIIA and potentially other neurodegenerative disorders

    Growth and mass wasting of volcanic centers in the northern South Sandwich arc, South Atlantic, revealed by new multibeam mapping

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    New multibeam (swath) bathymetric sonar data acquired using an EM120 system on the RRS James Clark Ross, supplemented by sub-bottom profiling, reveals the underwater morphology of a not, vert, similar 12,000 km2 area in the northern part of the mainly submarine South Sandwich volcanic arc. The new data extend between 55° 45′S and 57° 20′S and include Protector Shoal and the areas around Zavodovski, Visokoi and the Candlemas islands groups. Each of these areas is a discrete volcanic center. The entirely submarine Protector Shoal area, close to the northern limit of the arc, forms a 55 km long east–west-trending seamount chain that is at least partly of silicic composition. The seamounts are comparable to small subaerial stratovolcanoes in size, with volumes up to 83 km3, indicating that they are the product of multiple eruptions over extended periods. Zavodovski, Visokoi and the Candlemas island group are the summits of three 3–3.5 km high volcanic edifices. The bathymetric data show evidence for relationships between constructional volcanic features, including migrating volcanic centers, structurally controlled constructional ridges, satellite lava flows and domes, and mass wasting of the edifices. Mass wasting takes place mainly by strong erosion at sea level, and dispersal of this material along chutes, probably as turbidity currents and other mass flows that deposit in extensive sediment wave fields. Large scale mass wasting structures include movement of unconsolidated debris in slides, slumps and debris avalanches. Volcanism is migrating westward relative to the underlying plate and major volcanoes are asymmetrical, being steep with abundant recent volcanism on their western flanks, and gently sloping with extinct, eroded volcanic sequences to their east. This is consistent with the calculated rate of subduction erosion of the fore-arc

    Extremely Large Area (88 mm X 88 mm) Superconducting Integrated Circuit (ELASIC)

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    Superconducting integrated circuit (SIC) is a promising "beyond-CMOS" device technology enables speed-of-light, nearly lossless communications to advance cryogenic (4 K or lower) computing. However, the lack of large-area superconducting IC has hindered the development of scalable practical systems. Herein, we describe a novel approach to interconnect 16 high-resolution deep UV (DUV EX4, 248 nm lithography) full reticle circuits to fabricate an extremely large (88mm X 88 mm) area superconducting integrated circuit (ELASIC). The fabrication process starts by interconnecting four high-resolution DUV EX4 (22 mm X 22 mm) full reticles using a single large-field (44 mm X 44 mm) I-line (365 nm lithography) reticle, followed by I-line reticle stitching at the boundaries of 44 mm X 44 mm fields to fabricate the complete ELASIC field (88 mm X 88 mm). The ELASIC demonstrated a 2X-12X reduction in circuit features and maintained high-stitched line superconducting critical currents. We examined quantum flux parametron (QFP) circuits to demonstrate the viability of common active components used for data buffering and transmission. Considering that no stitching requirement for high-resolution EX4 DUV reticles is employed, the present fabrication process has the potential to advance the scaling of superconducting quantum devices
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